The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2003

Filed:

Jan. 06, 1999
Applicant:
Inventors:

Andrew Popplewell, Manchester, GB;

Stephen Williams, Manchester, GB;

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 2/706 ; H03D 1/00 ; H03D 3/24 ;
U.S. Cl.
CPC ...
H04L 2/706 ; H03D 1/00 ; H03D 3/24 ;
Abstract

An apparatus generally having a threshold slicer, a state logic device and a converter. The threshold slicer may be configured to generate a (i) first signal having an initial state of a plurality of states in response to a preceding value and a present value from an input signal and (ii) a second signal having a plurality of levels in response to the preceding value and the present value. The state logic device may be configured to generate a third signal having a sequence of the plurality of states starting with the initial state in response to the first signal. The converter may be configured to generate an output signal having the plurality of levels in response to the plurality of states in the third signal.


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