The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2003
Filed:
Feb. 12, 2001
S Brandon Keller, Fort Collins, CO (US);
Gregory Dennis Rogers, Fort Collins, CO (US);
Hewlett Packard Development Company, L.P., Houston, TX (US);
Abstract
A method is disclosed for identifying FETs that comprise NAND and NOR logic gates in a circuit design having numerous FETs. A potential logic gate output node is queried to determine the configuration of FETs around the output node. FETs connected directly between the output node and either a high or low potential (VDD or GND) are identified and stored to memory along with a their corresponding gate signals. Branch FETs that are of a different type than the directly-connected FETs and that are channel-connected between the output node and either VDD or GND are also identified. If a gate signal for each FET in a branch corresponds to a gate signal of a directly-connected FET at the same output node, then a logic gate exists.