The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2003
Filed:
Mar. 02, 2000
Dao-Long Chen, Fort Collins, CO (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A first-order digital PLL configured to accommodate a large frequency difference between a clock signal embedded in an incoming data stream received by a phase-locked loop and a local reference clock signal received by a phase-locked loop circuit. The PLL includes a data sampler which receives the incoming data stream, a frequency-locked loop (FLL) which receives the incoming data stream and is connected to the data sampler, and a frequency synthesizer which receives the local reference clock signal and is connected to the FLL. The FLL is provides a signal having a frequency which is substantially equal to the frequency of the local reference clock signal when no incoming data stream is received by the FLL, and provides a signal having a frequency which is substantially equal to the frequency of the incoming data stream when the FLL receives the incoming data stream.