The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2003
Filed:
Feb. 11, 2002
Jeffrey D. Chinn, Foster City, CA (US);
Yi-Hsing Chen, Sunnyvale, CA (US);
Robert Z. Bachrach, Burlingame, CA (US);
John Christopher Moran, Saratoga, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
The method of the invention involves depositing a plurality of thin layers of film, each layer having a thickness ranging from about 500Å to about 2000Å. Low Pressure Chemical Vapor Deposition or other techniques known in the art maybe used to deposit each thin layer of film. The film is polysilicon or silicon-germanium, where the germanium content ranges from about 4% by weight to about 20% by weight germanium. A Rapid Thermal Anneal (“RTA”) is performed on a deposited thin film layer to relieve residual film stress in at least that film layer. The use of RTA rather than furnace annealing permits much shorter annealing times. Optionally, but advantageously, hydrogen may be present during RTA to permit the use of lower processing temperatures, typically about 20% lower relative to a customary anneal. A series of film deposition/rapid thermal anneal cycles is used to produce the desired, nominal total thickness polysilicon film. This method is generally useful for producing polysilicon films in the range of from about 2 microns to about 20 microns.