Memory architecture for parallel data access along any given dimension of an n-dimensional rectangular data array

Abstract

A memory architecture is provided to enable parallel access along any dimension of an n-dimensional data array. To enable parallel access of s data elements along any dimension, the data elements of n-dimensional data array are mapped to s parallel memory banks in such a way that consecutive s data elements along any dimension are mapped to different memory banks. This mapping is defined by two functions, which define the memory bank number and location within a memory bank for each data element in n-dimensional data array. The necessary and sufficient conditions, which the mapping functions should satisfy in order to enable parallel data access, are described. These generic function pairs are described for all combinations of (n, s). Two particular instances of the mapping, namely circular permutation (rotation) along 0 dimension and dyadic permutation along 0 dimension have been discussed in detail. The mapping defined as dyadic permutation along 0 dimension holds only for values of s, which is integer power of 2. The mapping defined as circular rotation holds for any integer value of s. For these mappings, the basic architecture as well as its extensions are discussed. The basic architecture is for n-dimensional data array which has only s data elements along each dimension, whereas the extensions are for data arrays with m data elements along each dimension under the constraint that m is an integer multiple of s.