High data rate vector demodulator

Abstract

A demodulator for demodulating clear mode waveforms such as Phase Shift Keyed and Quadrature Amplitude Modulated waveforms, is capable of demodulating signals with much greater data rates than the clock rate of the device in which the demodulator resides by converting serial input samples into vectors. The input vectors are converted to “soft-decision” (data estimate) vectors which are input to a parallel-to-serial multiplexer, and the vector elements are output serially at the symbol clock rate to represent demodulated data. In the preferred embodiment, the vector demodulator at least includes a preprocessor, a digital phase shifter, and a symbol demodulator which, inter alia, outputs a phase rotator command signal to control the carrier recover phase rotation process in the digital phase shifter. As a result, the maximum symbol rate—and hence the maximum data rate—is raised up to N times the device maximum clock rate for waveforms such as Biphase Shift Keying, where N represents the number of data elements in the vectors, and 2N for waveforms such as Quadrature Phase Shift Keyed. The data rate is increased by a factor of N for one sample per symbol, and by a factor of N/2 for 2 samples per symbol, etc.