The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2003
Filed:
Jan. 18, 2002
Stefan Reithmaier, Vilsheim, DE;
Gerhard Thiele, Munich, DE;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source ( ) and a storage capacitor (C ) to which a voltage provided by a reference voltage source ( ) can be applied via a controllable switch. The charging voltage of this storage capacitor (C ) is the reference voltage to be generated. The controllable switch (P ) is a MOS field-effect transistor with back gate ( ) which, by means of a refresh signal supplied by a control circuit ( ), can be put periodically into either a conducting or a non-conducting state. The back gate ( ) of the MOS fieldeffect transistor (P ) is connected to an auxiliary storage capacitor (C ) to which the voltage supplied by the reference voltage source ( ) can be applied via a further switch, consisting of a MOS field-effect transistor (P ) with back gate ( ), and which is also controlled by the refresh signal. The back gate ( ) of the further MOS field-effect transistor (P ) is connected to a fixed voltage, which is greater than the voltage supplied by the reference voltage source ( ).