Method for manufacturing a compact bipolar transistor structure

Abstract

A bipolar transistor structure that includes a semiconductor material substrate that has a bottom substrate and base region of a first conductivity type and a buried layer, collector region and sink region of a second conductivity type. The substrate has an extrinsic base region of the first conductivity type and an emitter region of the second conductivity type, both of which extend from the substrate's upper surface into the base region. The bipolar transistor structure also includes a single patterned polysilicon layer with a first polysilicon portion of the first conductivity type in contact with the extrinsic base region and a second polysilicon portion of the second conductivity type in contact with the emitter region. The bipolar transistor structure is compact since contact to the extrinsic base region is made by the first polysilicon portion, which can be formed to a minimum dimension and self-aligned to the extrinsic base region. The extrinsic base and base regions can, therefore, be small, providing a low extrinsic base resistance, low base resistance and low collector-base capacitance. A process for forming such a bipolar transistor structure includes depositing a polysilicon layer and then implanting dopant ions of the first and second conductivity types into the polysilicon layer using first and second patterned mask layers, respectively. After etching the polysilicon layer, a thermal treatment creates an extrinsic base region and an emitter region by diffusing ions from the etched polysilicon layer. The process is inexpensive since it employs only a single patterned polysilicon layer.