The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2003
Filed:
May. 01, 2001
Shyama Mukherjee, Santa Clara, CA (US);
Joseph Levert, Vista, CA (US);
Donald DeBear, San Jose, CA (US);
Honeywell International Inc., Morristown, NJ (US);
Abstract
An electronic component contemplated comprises a) a substrate layer, b) a dielectric layer coupled to the substrate layer, c) a barrier layer coupled to the dielectric layer, d) a conductive layer coupled to the barrier layer, and e) a protective layer coupled to the conductive layer. The electronic component contemplated herein can be produced by a) providing a substrate; b) coupling a dielectric layer to the substrate; c) coupling a barrier layer to the dielectric layer; d) coupling a conductive layer to the barrier layer; and e) coupling a protective layer to the conductive layer. The protective layer may then be cured to a desirable hardness. A method of planarizing a conductive surface of an electronic component may comprise a) introducing or coupling a protective layer onto a conductive layer; b) dispersing the protective layer across the conductive layer; c) curing the protective layer; d) introducing an etching solution onto the conductive layer; and e) etching the conductive surface to substantial planarity.