The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2003

Filed:

Jan. 11, 2002
Applicant:
Inventors:

Sang Bae Yi, Seoul, KR;

Jae Seung Choi, Seoul, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract

A flash memory cell array and a method for programming and erasing data using the same are provided, in which problems related to over-erasing and disturbance are overcome and a cell area per bit is small to obtain high reliability and high packing density. In a flash memory cell array which includes a plurality of flash memory cells arranged in a matrix form, each of the cells including a selection transistor and a memory transistor serially connected with each other, a method for programming data using the flash memory cell array comprising the steps of setting a threshold voltage of the selection transistors at an initial threshold voltage level V before programming the flash memory cells at N bit data level (level of 2 ), selecting a cell for programming from the flash memory cells, and setting a threshold voltage level corresponding to the N bit in the selection transistors so that the memory transistor of the selected flash memory cell is programmed at a particular level among the N bit data level.


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