The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2003
Filed:
Jan. 31, 2002
Applicant:
Inventor:
Shizuo Cho, Miyazaki, JP;
Assignee:
Oki Electric Industry Co., Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract
A level adjustment circuit of the present invention includes a MOS transistor for pulling up an output node, a first inverter for inputting an output data signal and outputting a gate control signal for controlling a gate electrode of the MOS transistor, and a second inverter connected to the MOS transistor between the first and second electrodes for inputting the first node obtained based on the output data signal, and outputting the output node.
Cho, Shizuo. (2003). Level adjustment circuit and data output circuit thereof (U.S. Patent No. 6593795). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6593795
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile