The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2003

Filed:

Sep. 27, 2000
Applicant:
Inventors:

Akio Ichikawa, Kawagawa, JP;

Kenji Mogi, Osaka, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 2/316 ;
U.S. Cl.
CPC ...
G01R 2/316 ;
Abstract

The CPU outputs to the delay circuit delay time setting signals for setting the delay time, based on input delay time data input from an external input device. The delay circuit re-sets the delay time via new delay setting signals input from the CPU and delays the trigger signals input from the trigger circuit based on the specified delay time and outputs the resulting signals to the clock generator The clock generator outputs new sample start signals to the A/D sampler at the input timing of the delayed trigger signals input from the delay circuit thus changing the sampling start timing of interference signals in the A/D sampler.


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