The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2003

Filed:

Jun. 20, 2000
Applicant:
Inventors:

Akihiro Takagi, Kawasaki, JP;

Tadatsugu Hirose, Kawasaki, JP;

Shigeki Kameyama, Kawasaki, JP;

Tomokatsu Kishi, Kawasaki, JP;

Noriaki Setoguchi, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J 1/749 ;
U.S. Cl.
CPC ...
H01J 1/749 ;
Abstract

A plasma display panel having a high power efficiency by reducing parasitic capacitances comprises first and second substrates disposed facing each other, a plurality of address lines formed on the first substrate and extending along a first direction and a plurality of X and Y electrodes formed on the second substrate and extending along a second direction crossing the first direction. A first dielectric layer covers the X and Y electrodes formed on the second substrate, the first dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate, and a trench formed at least through the first dielectric layer in an area between two adjacent X and Y electrodes, the trench extending along the second direction. Alternatively, a plurality of projections extends along the second direction, crossing the first direction, a plurality of X and Y electrodes being formed on the second substrate along the projections, the X and Y electrodes, respectively, being formed in opposite side areas of each projection, and a dielectric layer covering each of the X and Y electrodes and formed in the opposite side areas of each projection on the second substrate, the dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate.


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