System and method for specifying hardware description language assertions targeting a diverse set of verification tools

Abstract

A method, and system in support thereof, of specifying hardware description language assertions targeting a diverse set of verification tools to provide verification of a logic design by the set of verification tools. The constraints and properties of the logic design are described in the HDL using one or more high-level assertion specification macros representative of the assertions of the logic design. The one or more assertion specification macros are stored as components within a specification macro library for later retrieval as needed. Upon reading original HDL source code containing assertion macro calls to the assertion specification macros, a specification macro processor accesses the definitions of the assertion macros stored, if contained within a definition library, and uses these definitions as templates to automatically write expansion HDL code into the HDL source code and to automatically store tool-specific HDL code into corresponding tool-specific modules libraries for later use by one or more verification tools. If definitions of one or more of the assertion macros are not contained with the definition library, they may be written as needed.