The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2003
Filed:
Jul. 22, 1999
Kenichiro Sonoda, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A block dividing means ( ) receives an original netlist (D ) defining a circuit to be simulated, selects a to-be-analyzed block specifying a device included in the circuit to be simulated based on input parameters provided from a parameter input means ( ), divides the selected to-be-analyzed block into a plurality of to-be-analyzed sub-blocks, establishes an electric connection between the plurality of to-be-analyzed sub-blocks so as to provide a circuit configuration equivalent to the to-be-analyzed block, and finally outputs a modified netlist (D ) defining a new circuit to be simulated in which the to-be-analyzed block is replaced with the plurality of to-be-analyzed sub-blocks. A circuit simulation means ( ) performs a circuit simulation on the new circuit to be simulated which is defined by the modified netlist (D ). A device for and method of simulation provides a simulation result which reflects the shape of the device in a short period of calculation time.