The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2003
Filed:
Aug. 28, 2001
Koen Lampaert, Irvine, CA (US);
Andy Brotman, Irvine, CA (US);
Paolo Miliozzi, Irvine, CA (US);
Paramjit Singh, Lake Forest, CA (US);
Mishel Matloubian, Irvine, CA (US);
Bijan Bhattacharyya, Irvine, CA (US);
Francis M Rotella, Tustin, CA (US);
Rajesh Divecha, Irvine, CA (US);
Conexant Systems, Inc., Newport Beach, CA (US);
Abstract
In one embodiment, a number of parameter values for an inductor, such as a spiral inductor, are received. Examples of the parameter values are Number of Turns, Spacing, Width, Xsize, and Ysize parameter values. From the received parameter values, a number of parasitic values for a subcircuit model of the inductor are determined. For example, parasitic resistor values and parasitic capacitor values of the inductor are determined. The parasitic resistor values and parasitic capacitor values are used in simulating the circuit comprising the inductor. An inductor layout is then generated that results in parasitic values that are the same as the parasitic values already used in simulating the circuit comprising the inductor. As such, the parasitic values of the inductor have already been taken into account in the initial circuit simulation and, there is no need to extract the internal parasitics of the inductor for further circuit simulations.