Circuit for converting input serial data in a plurality of possible formats into output data in parallel format by interpreting input data format indication information

Abstract

A versatile serial to parallel interface capable of both receiving multiple types of input formats and operating in multiple operational modes includes a multiplexer, a signal generator, and a register. The multiplexer receives serial data from a plurality of possible data sources and, in response to a set of selection signals, outputs one of the sets of serial data to the signal generator. The signal generator thereafter forwards the serial data to the register for storage. In addition to forwarding the serial data to the register, the signal generator also generates clock and control signals. These signals are used to control the operation of the register to ensure proper serial to parallel conversion of the input serial data. In addition, these signals may also be provided to the source of the serial data to control the actions of the data source. The signal generator generates the clock and control signals in response to indication information provided to the signal generator. This indication information may include information relating to: (1) the desired mode of operation (e.g. slave or master) of the serial to parallel interface; and (2) the format (e.g. left justified or right justified) of the incoming serial data. This indication information gives the signal generator all of the information that it needs regarding the data source and the incoming data to generator all of the necessary signals for ensuring the proper operation of the serial to parallel interface.