The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2003

Filed:

May. 25, 2001
Applicant:
Inventors:

Masato Sumikawa, Kashihara, JP;

Kazumi Tanaka, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 ; H05K 1/18 ;
U.S. Cl.
CPC ...
H05K 7/02 ; H05K 1/18 ;
Abstract

In the semiconductor device, externally connecting electrodes are placed on a semiconductor substrate. A rewiring pattern for connecting each on-chip electrode to corresponding external connecting electrode is routed, in the vicinity of the externally connecting electrode, in a direction where the effect of strain after mounting of the semiconductor substrate is small. Specifically, the rewiring pattern is routed such that the routing direction will not match the direction coupling the center of the semiconductor substrate to the externally connecting electrode along which large thermal stress is expected. Accordingly, strain that will occur at the rewiring pattern after mounting the semiconductor substrate to the mounting board is reduced. Adverse effects of the strain stress can be prevented without widening the externally connecting interconnection.


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