The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2003

Filed:

Apr. 23, 1999
Applicant:
Inventors:

Tomohiko Yamamoto, Nara, JP;

Keiichi Tanaka, Tenri, JP;

Naoto Inoue, Shiki-gun, JP;

Kouji Fujiwara, Tenri, JP;

Yasunobu Tagusa, Ikoma, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/136 ;
U.S. Cl.
CPC ...
G02F 1/136 ;
Abstract

A pixel substrate has a plurality of scanning lines and a plurality of reference signal lines which are arranged parallel with each other. A counter substrate includes a plurality of signal lines. Moreover, the pixel substrate has a connecting line for connecting the plurality of the reference signal lines to each other. The connecting line is provided in each of two regions outside of two sides among the peripheral sides of a region where a plurality of pixel electrodes are formed, the two sides being perpendicular to the reference signal lines. In this structure, a reference signal is input from both ends of the reference signal line. It is therefore possible to provide a liquid crystal display device which reduces the occurrence of a short circuit between the lines on the substrate and decreases the signal delay due to the load capacitance.


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