The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2003
Filed:
Mar. 25, 2002
Wern-Yan Koe, Cupertino, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A digital system in a first clock domain synchronously initializes a logic circuit having a memory characteristic. The digital system includes first and second logic circuits. The first circuit includes an asynchronous port for receiving a reset signal from a second clock domain, a port for receiving a first clock signal for the first clock domain, and an output port for providing an initialization signal. The first circuit sets the initialization signal at a first logic value in response to the reset signal and maintains the first logic value at least until the first clock signal becomes active. The second circuit includes a synchronous port for receiving the initialization signal, a port for receiving the first clock signal, and a data output port outputting a data signal. The second circuit is initialized in response to the active first clock signal when the initialization signal has the first logic value.