The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2003

Filed:

Dec. 19, 2001
Applicant:
Inventors:

Steven A. Schauer, Loveland, CO (US);

David L. Schell, Fort Collins, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9175 ; G06F 1/300 ;
U.S. Cl.
CPC ...
H03K 1/9175 ; G06F 1/300 ;
Abstract

An order in which bits for serial data are transmitted or received by a first device, integrated circuit (IC) or logic, is programmable to be either from most significant bit (MSB) to least significant bit (LSB) or from LSB to MSB. Therefore, when the first device is used with a second device, integrated circuit (IC) or logic, which can handle the serial data in only one order, the first device is programmed, or configured, to handle the serial data in the same order as the second device.


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Schauer, Steven. (2003). Programmable bit ordering for serial port (U.S. Patent No. 6586968). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6586968

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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