Method of avoiding the effects of lack of uniformity in trench isolated integrated circuits

Abstract

Method for fabricating integrated circuits comprising non-volatile memory cell matrices and peripheral circuits, said method comprising the steps of preparing a silicon substrate, carrying out a shallow trench isolation process on the silicon substrate to form active areas of exposed silicon isolated from one another by trenches filled with field oxide, growing a thin oxide layer on the active areas, masking the substrate areas intended for the memory cell matrices and etching the thin oxide layer and the field oxide by a chemical etch for a time longer than the time needed for removing the thin oxide layer entirely from the substrate areas intended for the peripheral circuits.