The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2003
Filed:
May. 18, 1999
Richard Allen Kelley, Apex, NC (US);
Danny Marvin Neal, Round Rock, TX (US);
Adalberto Guillermo Yanes, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for optimally processing split request transactions across a PCI-X bridge with a PCI-X bridge buffer. The split transaction mode of the PCI-X bridge buffer is toggled between a No Over-commit mode and an over-commit mode. Over-commitment of the buffer is inhibited when the split transaction mode is toggled to the No Over-commit mode and when the buffer is over committed by the bridge. At least some over-commitment of the buffer is allowed by the bridge when the split transaction mode is toggled to the over-commit mode and when the buffer is not over committed by the bridge. The over-commit mode may be an Over-commitment mode or a Flood mode. The Over-commitment mode allows some degree of over commitment of the buffer by the bridge while the Flood mode allows the bridge to forward all split request transactions regardless of size of the transactions or amount of available space in the buffer when the Over-commit mode is in a Flood mode. The split request transaction is controlled and forwarded based on the toggled split transaction mode. The system comprises at least a toggle switch and a control system. The split transaction mode is toggled to or maintained at a particular mode based on whether a retry or disconnect of the split completion transaction by the PCI-X bridge has or has not occurred and whether the buffer is or is not over committed.