The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2003
Filed:
Feb. 27, 2002
Applicant:
Inventor:
Takashi Terauchi, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/100 ;
U.S. Cl.
CPC ...
H01L 2/100 ;
Abstract
A method of manufacturing semiconductor device having a structure in which the potential of a gate interconnection is not affected by that of a bit line when a dummy pad contact is formed at an end portion of a memory cell, in which no steps are formed in the vicinity of a memory cell end are obtained. The semiconductor device includes dummy pad contacts arranged in a dotted line, which are smaller than a first pad contact in the memory cell body and are opened using a self-alignment method, and a conduction is cut-off in a path leading from the dummy pad contact to the bit line.