The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2003
Filed:
Mar. 16, 2000
Marc R. Faucher, South Burlington, VT (US);
Jack R. Smith, South Burlington, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A data processing system ( ) having a synchronous interface and partitioned clock and I/O logic controller structure. The system includes a plurality of processing components ( ), each having a plurality of I/O logic controllers ( ). In addition, the system includes a plurality of clock sources ( ) for providing clock signals and a plurality of multiplexers ( ) connected to said plurality of clock sources and to at least two of said I/O logic controllers. The clock signals differ from one another in frequency or in skew, i.e., time delay. By appropriate control of clock select registers connected to the plurality of multiplexers, one of the plurality of clock signals from the clock sources may be provided to the two or more I/O logic controllers connected to a given multiplexer. This permits different groups of I/O logic controllers to receive different clock signals in parallel. As a consequence, the signal interface for the system is partitioned into multiple group with each group controlled by a separate clock.