The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2003

Filed:

Nov. 25, 1997
Applicant:
Inventors:

Charles C. Austin, Mission Viejo, CA (US);

Kevin Feshangchi, Mission Viejo, CA (US);

Jeff Harth, Tustin, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract

Apparatus for flexibly locating the data page on which the peripheral registers are located. External hardware contentions are eliminated because the peripheral registers can be relocated anywhere in the system address space. Hardware design is therefore much more flexible. Further, because the present invention allows peripheral registers to overlay internal data memory, data transfers can be carried out between data and peripherals using the same data page pointer. No intermediate pointer loading operations are required and memory operations to the peripheral registers can be carried out at maximum speed. The present invention allows peripheral registers to overlay data memory in a manner that permits the overlaid memory to be recovered and used for other purposes. Processor program code can be designed to overlay internal data memory with the peripheral registers while performing data transfers between the data memory and the peripheral registers. The overlaid data memory is not accessible while it is overlaid. Then, after completing transfers, the peripheral registers can be relocated elsewhere so that the underlying internal data memory is recovered. The underlying data memory is not disturbed when writing to the overlaying peripheral registers.


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