The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2003
Filed:
Aug. 27, 2001
Keisuke Fujiwara, Tokyo, JP;
Sachiko Edo, Tokyo, JP;
Other;
Abstract
A semiconductor integrated circuit ( ) having normal operation mode and a burn-in mode is provided. The semiconductor integrated circuit ( ) can include a memory ( ) and a logic circuit ( ). The memory ( ) may operate in response to input signals (input< >) when in the burn-in mode while the logic circuit ( ) may operate in response to control signals generated in response to one of the input signals (input< >) having a predetermined value when the semiconductor integrated circuit ( ) operates in the burn-in mode. The memory ( ) may operate in response to memory control signals generated by the logic circuit ( ) when the semiconductor integrated circuit ( ) operates in the normal operation mode. The logic circuit ( ) may generate the memory control signals in response to values provided by input signals (input< >). In this way, the logic circuit ( ) and memory ( ) may be tested in the burn-in mode without providing additional inputs.