The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2003
Filed:
Jul. 27, 2000
Leslie Ronald Avery, Flemington, NJ (US);
Peter Daryl Gardner, Lubec, ME (US);
Sarnoff Corporation, Princeton, NJ (US);
Abstract
An electrostatic protection (ESD) circuit for an integrated circuit (IC) includes a string of a plurality of diodes connected between a Vss line and a Vdd line. A first PMOS transistor and a first NMOS transistor are connected in series between the Vdd line and the string of diodes. The first PMOS transistor has a gate connected between two of the diodes of the string, and the NMOS transistor has a gate connected to the Vdd line. A second PMOS transistor and a second NMOS transistor are connected in series between the Vss line and the Vdd line with the PMOS transistor having a gate connected to the junction between the first PMOS transistor and the first NMOS transistor and the second NMOS transistor having a gate connected to the Vdd line. A clamp NMOS transistor is connected between the Vss line and the Vdd line and has a gate connected to the junction between the second PMOS transistor and the second NMOS transistor. A diode may be connected between the Vdd line and the second PMOS transistor.