The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2003
Filed:
Jul. 24, 1995
Robert Keith DeHaven, Austin, TX (US);
James F. Wenzel, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method, apparatus, and circuit distribution wafer (CDW) ( ) are used to wafer-level test a product wafer ( ) containing one or more product integrated circuits (ICs). The CDW ( ) contains circuitry which is used to test the ICs on the product wafers ( ). A connection from the product wafer ( ) to the CDW ( ) is made via a compliant interconnect media (IM) ( ). Through IM ( ), the CDW ( ) tests the product wafer ( ) under any set of test conditions. Through external connectors and conductors ( and ) the CDW ( ) transmits and receives test data, control information, temperature control, and the like from an external tester ( ). To improve performance and testability, the CDW ( ) and heating/cooling ( and ) of the wafers may be segmented into two or more wafer sections for greater control and more accurate testing.