The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2003

Filed:

Jan. 27, 2000
Applicant:
Inventors:

Ashok Swaminathan, Ottawa, CA;

Mark Miles Cloutier, Aylmer, CA;

James Andrew Cherry, Ottawa, CA;

Assignee:

Conexant Systems, Inc., Newport Beach, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 2/706 ;
U.S. Cl.
CPC ...
H04L 2/706 ;
Abstract

Disclosed is a frequency-locked loop (FLL), which attempts to bring about frequency and phase synchronization between two signals over the control bandwidth of the loop: a reference signal and a voltage-controlled oscillator (VCO) signal. For example, the FLL employs a reference signal generated by a crystal oscillator of frequency f and a VCO signal generated by the oscillations of an unquenched SRG resonator with tunable resonant frequency f . These signals are connected to the inputs of a phase/frequency detector (PFD) which produces output pulses in response to the relationship between f and f . These pulses are applied to a loop filter (LF) which creates a voltage using some kind of charge-storage element. This loop filter voltage is a so-called error voltage whose value is used to control the frequency of the resonator to bring the reference signal and VCO signal into phase synchrony.


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