The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2003

Filed:

Oct. 20, 2000
Applicant:
Inventor:

Stephen V. R. Hellriegel, Bainbridge Island, WA (US);

Assignee:

Cray Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 ;
U.S. Cl.
CPC ...
H03K 3/00 ;
Abstract

A clock distribution tree for use with a semiconductor chip. The package for a semiconductor chip includes a clock distribution tree having a plurality of output terminals for connection to a plurality of input pads on a semiconductor chip. According to one embodiment, the semiconductor chip includes a clock receiving and conditioning circuit which is coupled to a clock input signal line. The clock receiving and conditioning circuit receives a clock signal, filters it, amplifies it and outputs it back to the package having a clock distribution tree thereon. The clock distribution tree thereafter distributes the clock signal to the appropriate locations of the semiconductor chip through clock output terminals coupled to clock input paths on the semiconductor chip.


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