The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2003
Filed:
Sep. 27, 2001
Mehmet M. Eker, Santee, CA (US);
Applied Micro Circuits Corporation, San Diego, CA (US);
Abstract
A driver circuit which has a reduced or eliminated crowbar current includes a P-channel type transistor having a source coupled to a reference voltage; an N-channel type transistor having a source coupled to ground and a drain coupled to a drain of the P-channel type transistor; first logic gate circuitry (e.g., a NOR gate) having an input coupled to a reference clock signal and an output coupled to a gate of the P-channel type transistor; and second logic gate circuitry (e.g., a NAND gate) having an input coupled to the reference clock signal and an output coupled to a gate of the N-channel type transistor. The first logic gate circuitry is designed to have a first input voltage threshold value (e.g., ¼ V ) that is different from a second input voltage threshold value (e.g., ¾ V ) of the second logic gate circuitry. Thus, the output from the first logic gate circuitry provides off-to-on transitions which precede off-to-on transitions provided from the output of the second logic gate circuitry and on-to-off transitions which succeed on-to-off transitions provided by the second clock input signal.