Timing calibration and timing calibration verification of electronic circuit testers

Abstract

Systems and methods for calibrating the timing of electronic circuit testers and verifying the timing calibration of electronic circuit testers are described. In some embodiments, a calibration reference signal is transmitted from the test head directly through the load board interface, rather than through external instruments, so that timing errors associated with external wires and cables may be avoided. The timing calibration and timing calibration verification functionality is provided on a single calibration board, thereby reducing the calibration set-up time relative to conventional robot-based calibrators. In addition, a high pin count electronic circuit testers may be calibrated by a calibration board that is configured to calibrate one subset of the test channels at a time. In some embodiments, test channels are connected directly to calibration board comparators to avoid the accumulated signal degradation and the signal path route errors that may result from transmitting tester channel signals through a mechanical relay selection matrix.