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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6569764 B1

PDFFull Text
Date of Patent:
May. 27, 2003

Filed:

Aug. 29, 2000

Method of manufacturing a semiconductor package by attaching a lead frame to a semiconductor chip via projecting electrodes and an insulating sheet of resin material

Applicant:
Inventors:

Toshinori Hirashima, Takasaki, JP;

Yasushi Takahashi, Takasaki, JP;

Ryoichi Kajiwara, Hitachi, JP;

Masahiro Koizumi, Hitachi, JP;

Munehisa Kishimoto, Kamakura, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:

Mattingly, Stanger & Malur, P.C.

Primary Examiner:

Carl Whitehead, Jr

Assistant Examiner:

Nema Berezny

Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ; H01L 2/3495 ; H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ; H01L 2/3495 ; H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
Abstract

The semiconductor device includes a semiconductor chip having a first electrode and a second electrode formed on a first main surface and a third electrode formed on a second main surface opposite the first main surface. A first portion of a first lead is placed on the first electrode and a second portion of the first lead is located outside the semiconductor chip. A first portion of a second lead is placed on the second electrode and a second portion of the second lead is located outside the semiconductor chip. A plurality of projecting electrodes are provided between the first portion of the first lead and the first electrode and between the first portion of the second lead and the second electrode to electrically connect them. An insulating sheet is provided between the first portion of the first lead and the first main surface of the semiconductor chip and between the first portion of the second lead and the first main surface of the semiconductor chip. The insulating sheet covers the first main surface of the semiconductor chip in areas other than a region in which the plurality of projecting electrodes are provided.

Find Patent Forward Citations

Hirashima, Toshinori. (2003). Method of manufacturing a semiconductor package by attaching a lead frame to a semiconductor chip via projecting electrodes and an insulating sheet of resin material (U.S. Patent No. 6569764). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6569764

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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