The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2003

Filed:

Mar. 02, 2000
Applicant:
Inventor:

Masanori Yamaguchi, Tsukuba, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A lumped constant line approximating system capable of approximating a distributed constant line with required accuracy. The system receives inputs of object circuit information and analysis conditions (Steps ), calculates a product &ggr;l of the propagation constant &ggr; and the line length l (Step ), and calculates cosh &ggr;l and sinh &ggr;l by using the product &ggr;l (Step ) to obtain functions a (&ggr;l), b (&ggr;l) and c (&ggr;l). Then, absolute values &dgr; , &dgr; and &dgr; of the differences between these functions and cosh &ggr;l or sinh &ggr;l are obtained, and compares the maximum &dgr; among them with an error tolerance &egr;. If &dgr;<&egr;, the processing ends, while if &dgr;<&egr; is not satisfied, the number of division is increased by 1, and the above processing is repeated, until the number n of division for approximation is determined (Step ). Using the determined number of division, a ladder circuit is defined, for example, by cascading &Pi; circuits (Step ), and stored (Step ).


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