The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2003
Filed:
Jan. 25, 1999
James Edward Guziak, Laurys Station, PA (US);
Agere Systems, Inc., Allentown, PA (US);
Abstract
An asynchronous logic circuit allows a host Controller or hub to enter a low power state with its clock suspended. When a power manager calls for a low power state, the clock in the host or hub is suspended and the asynchronous logic circuit is engaged. The asynchronous logic circuit can detect events on the port while the host or hub is in the low power mode. The asynchronous logic circuit generates a downstream signal if required and sends out a wake up signal to the power manager. After the host or hub is awake, the host or hub regains control of the bus and the asynchronous logic circuit is disengaged.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile