The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2003
Filed:
Sep. 27, 2001
Hideaki Nii, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo-To, JP;
Abstract
A semiconductor device comprises an SOI substrate formed with a mono-crystalline semiconductor layer through an embedded insulating layer on a first conductivity type semiconductor substrate; a MIS type field-effect transistor provided within a device region defined by isolating said mono-crystalline semiconductor layer with a device isolation region and having a gate electrode; an opening formed penetrating said device isolation region and said embedded insulating layer and reaching said semiconductor substrate; and a substrate electrode provided covering said opening and taken out up to the surface flush with said gate electrode. And a method of manufacturing a semiconductor device, comprises providing a device isolation region for defining a device region on a mono-crystalline semiconductor layer of an SOI substrate formed with a mono-crystalline semiconductor layer through an embedded insulation payer on a semiconductor substrate of a first conductivity type; forming an opening penetrating said device isolation region and said embedded insulation layer and reaching said semiconductor substrate; depositing polysilicon on said SOI substrate and within said opening and providing a gate electrode and a substrate electrode of said MIS type field-effect transistor by executing the patterning thereon; and implanting impurities into said gate electrode and said substrate electrode.