Method for fabricating connection structure between segment transistor and memory cell region of flash memory device

Abstract

In a flash memory device, electrical connections between segment transistors and memory cells are accurately achieved by forming the segment transistors before forming the memory cells. When forming the segment transistors, a first impurity is implanted into a substrate to form a first source and a first drain. A second impurity is then implanted into the substrate to form a conductive line to be used as a common bit line for the memory cells, and simultaneously form a second source below the first source and a second drain below the first drain of the segment transistor. As such, the common bit lines of the memory cells and the second sources of the segment transistors are formed to be electrically connected together with more reliability.