The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Dec. 30, 1999
Applicant:
Inventor:

Atsushi Yamashita, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

A bit deinterleave circuit comprises: measurement unit for measuring the reception level of each bit in a received symbol completing a bit interleave process; a command-signal generating unit for outputting a command signal to indicate whether computation in error correction is to be inhibited or permitted for each symbol on the basis of the reception level of the symbol measured by the measurement unit and a threshold value; a first deinterleave unit for deinterleaving the received signal completing a bit interleave process; and second deinterleave unit for rearranging command signals to output the command signals according to a signal output by the first deinterleave unit.


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