The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Dec. 03, 1999
Applicant:
Inventors:

Tan Thanh Ho, Santa Clara, CA (US);

Scott William Mitchell, San Jose, CA (US);

Ryan Hirth, Windsor, CA (US);

Ngo Thanh Ho, San Jose, CA (US);

Assignee:

3Com Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/26 ;
U.S. Cl.
CPC ...
G06F 1/26 ;
Abstract

A circuit and method thereof for arbitrating between a first power source and a second power source in a computer system peripheral device such as a network adapter (e.g., a network interface card) that is connected to multiple power sources. The circuit includes a field effect transistor (FET) and a diode integral with the FET coupled between the first power source and the second power source. The FET is adapted to conduct current from the second power source when power is not available from the first power source, and to substantially prevent current from flowing from the first power source to the second power source. The circuit also includes a voltage regulator coupled between the first power source and the second power source, adapted to regulate voltage such that a voltage from the first power source and a voltage from the second power source are approximately equal.


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