The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Jan. 10, 2002
Applicant:
Inventors:

Koichi Kamikuri, Kanagawa, JP;

Hitoshi Shibue, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/302 ;
U.S. Cl.
CPC ...
H01L 2/302 ;
Abstract

The present invention provides a semiconductor device bonded to a wiring board in a flip-chip bonding manner, wherein bumps for the flip-chip bonding are formed on a front surface of the semiconductor element, and a wiring pattern to which bumps and bonding wires for another semiconductor element are connected is formed on a back surface of the semiconductor element. The present invention also provides a semiconductor device structure including a first semiconductor element and a second semiconductor element sequentially stacked in multi-stages on a wiring board by flip-chip bonding, wherein a wiring pattern of the first semiconductor element is bonded to segments of wiring formed on the wiring board by means of bonding wires. With this configuration, it is possible to realize a thin semiconductor device of a stacked structure including a plurality of semiconductor elements mounted at a higher density and hence to miniaturize an electronic device using the semiconductor device.


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