The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2003
Filed:
Jul. 26, 2001
Yuichi Miyagawa, Tokyo, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
The invention aims to easily suppress chipping on the reverse face of a semiconductor when a semiconductor wafer is cut, and to make it possible to easily prevent edge contact of bonding wires. A resin film ( ) is formed at the periphery of boundary regions (corresponding to ) provided for chip separation of semiconductor chips ( ). Then, the semiconductor wafer ( ) is diced by cutting along the central part (corresponding to ) of the boundary region. Furthermore, in a semiconductor device having semiconductor elements formed on a semiconductor substrate, the resin film ( ) is formed on a part of the boundary regions provided for chip separation, matching the bonding pads ( ) of each chip. Alternatively, the resin film ( ) is formed with a predetermined width on the periphery of the abovementioned boundary regions. Additionally, the arrangement is such that the semiconductor substrate ( ) and the abovementioned wires do not touch when bonding wires ( ) are connected at the time of mounting the semiconductor chips.