The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2003
Filed:
Jun. 18, 2001
Jae-Deok Park, Seoul, KR;
LG Electronics Inc., Seoul, KR;
Abstract
The thin film transistor includes an insulating substrate, and an active region formed on the insulating substrate. The active region includes a channel region, a source region formed on a first side of the channel region, a drain region formed on a second side of the channel region, a sub-channel region formed between the channel region and at least one of the source region and the drain region, and a first region formed between the channel region and each sub-channel region. The thin film transistor also includes an insulating layer formed on the channel region and each sub-channel region, a gate electrode formed on the insulating layer over the channel region, and a sub-gate electrode formed on the insulating layer over each sub-channel region. When impurities are implanted therein, the first region forms a lightly doped region; otherwise, each first region forms an offset region. During the doping of the source and drain regions with high concentration impurity ions, an implantation mask is formed over at least a portion of the gate electrode, at least a portion of each sub-gate electrode, and each first region. Accordingly, the width of each sub-gate electrode provides a margin of error when aligning the deposition of the mask.