Sequencer of synchronous actions in a processor system, and integrated circuit including such sequencer

Abstract

For triggering actions synchronous with a system clock in an electronic system comprising a management processor, a program memory and peripheral units, the sequencer comprises: an instruction register including a date field for containing an instruction execution date, an instruction code field and a data field, means for loading the instruction register from the program memory via a DMA channel, a comparator receiving a current date obtained from the system clock and the execution date contained in the date field of the instruction register, and a control logic unit for decoding the contents of the instruction code and data fields of the instruction register and triggering actions deduced from such decoding at the time the comparator shows that the current date has reached the execution date in the peripheral units and without intervention by the management processor.