The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2003
Filed:
Mar. 31, 2000
Applicant:
Inventor:
Shinsuke Nishida, Tokyo, JP;
Assignee:
Fourie, Inc., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/202 ;
U.S. Cl.
CPC ...
G06F 1/202 ;
Abstract
In a memory device with variable bank partition architecture, a plurality of bank level signals each of which specifies a number of bank divisions are input from the respective bank level terminals. Further, a plurality of address signals, each of which specifies one of the banks, are input from the address terminals. Data input from data input/output terminals are stored in batch in all access units in a memory address area corresponding to a bank specified by a bank address signal among those obtained by dividing a memory address space or an upper bank based on bank level signals.