The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2003

Filed:

Oct. 24, 2000
Applicant:
Inventors:

Byung-Chul Ahn, Kyoungsangbuk-do, KR;

Soon-Sung Yoo, Kyoungsangbuk-do, KR;

Yong-Wan Kim, Kyoungsangnam-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1343 ; G02F 1/136 ;
U.S. Cl.
CPC ...
G02F 1/1343 ; G02F 1/136 ;
Abstract

The present invention discloses a method of manufacturing a liquid crystal display device, including: providing a substrate; depositing sequentially a first metal layer and a first insulating layer on the substrate; patterning the first metal layer and the first insulating layer using a first mask to form a gate line and a first gate insulating layer; depositing sequentially a second gate insulating layer, a pure semiconductor layer, a doped semiconductor layer and a second metal layer over the whole substrate; patterning the second metal layer using a second mask to form a data line, source and drain electrodes, a capacitor electrode, the capacitor electrode overlapping a portion of the gate line; etching the doped semiconductor layer between the source and drain electrodes to form a channel region; depositing a third insulating layer over the whole substrate; patterning the third insulating layer using a third mask to form a passivation film, the passivation film having a smaller width than the data line and covering the source and drain electrodes and exposing a portion of the drain electrode and the capacitor electrode; depositing a transparent conductive material layer over the whole substrate; and patterning the transparent conductive material layer using a fourth mask to pixel electrode, the pixel electrode contacting the drain electrode.


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