The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2003
Filed:
Oct. 30, 1998
Geoffrey S. Strongin, Austin, TX (US);
Qadeer A. Qureshi, Round Rock, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A method and system for improving memory access in Accelerated Graphics Port systems. The method and system associate a transaction id with individual data transactions within a number of Accelerated Graphics Port (AGP) pipelined data transactions, and identify the individual data transactions within the number of AGP pipelined data transactions via the transaction id. In one instance, the association of a transaction id with individual data transactions includes but is not limited to associating a transaction id with each individual memory read request within a number of AGP pipelined memory read requests and associating an identical transaction id with each individual data unit, within a number of pipelined data units, corresponding to each individual memory read request within the number of AGP pipelined memory requests. In another instance, the association of a transaction id with individual memory read requests within a number of AGP pipelined memory read requests includes but is not limited to placing a transaction id on a Side Band Addressing bus substantially immediately after placing a read request on the same Side Band Addressing bus, and the association of an identical transaction id with individual data units within a number of the data units associated with pipelined data units corresponding to each of the AGP pipelined memory read requests includes but is not limited to placing a transaction id on a ST[ ] bus while substantially simultaneously placing a data unit on an AGP Interconnect.