The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2003
Filed:
Jul. 18, 2000
Scott O. Frake, Cupertino, CA (US);
Jason R. Bergendahl, Campbell, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A low pass filter (LPF) is provided that smoothes and significantly slows any change in its input voltage. The capacitance of the LPF is provided by an NMOS transistor having its source and drain tied to ground. The resistance of the LPF is provided by a plurality of series-connected PMOS transistors. The gates of the PMOS transistors are coupled to ground and therefore these transistors are conducting. The PMOS transistors are fabricated in a floating well. Therefore, the LPF eliminates any capacitive coupling between a voltage supply and the well. Thus, any variation in the supply voltage fails to affect adversely the functioning of the PMOS transistors. Thus, the LPF of the present invention can advantageously smooth and significantly slow any change in its input voltage. In one embodiment, the input voltage is a reference voltage. In this manner, a voltage regulator, which receives the filtered reference voltage from the LPF, in turn provides a significantly more constant regulated voltage to the internal circuits of the IC. Thus, the present invention advantageously minimizes the possibility of a malfunction in a digital system due to a variation in the regulated voltage.