Synchronizing device and method that adjusts readout speed according to remaining quantity of data in memory while operating decoder on fixed frequency system clock

Abstract

A synchronizing device and a synchronizing method whose constitution is simple and whose operation is easy to be stabilized are provided. A subtracter subtracts a value of a read pointer which calculates number of data read-out from a memory device from a value of a write pointer which calculates number of data written in the memory device to obtain subtraction value, thus causing the subtraction value to be given to a judging unit as detection data remaining quantity. The judging unit outputs comparison result signal while comparing detection data remaining quantity with reference value. A number of data increasing/decreasing unit receives data from a decoder for decoding data of the memory device. The number of data increasing/decreasing unit causes remaining quantity of data of the memory device to be prescribed value with data reading-out speed of the memory device controlled in such a way that it controls quantity of data outputted, while replying to comparison result signal from the judging unit.