System and method in a modem for providing a shortened reset pulse upon receipt of an external reset pulse

Abstract

A system and method for providing a shortened DSP reset pulse to cause a modem to reset and enter a sleep mode as soon as possible after receipt of an external reset pulse issued by a host. A reset controller detects the external reset pulse, issues a separate reset pulse to the modem, monitors the modem's clock and then terminates the separate reset pulse after a prescribed duration. The prescribed duration is determined by the minimum time required by the DSP to reset. The invention is embodied in a modem connected to an external controller. The modem includes a DSP having a reset terminal and a clock. The DSP begins performing a reset upon a first signal applied to its reset terminal and causes the modem to enter a sleep-mode after a second signal is applied to its reset terminal. The external controller is capable of transmitting an external signal. The reset controller in the modem has a counter and an output node. The counter is connected to the clock and provides a counter output signal upon receipt of a predetermined number of cycles of the clock. The counter initiating generally concurrent with receipt of the external signal. The output node is connected to the reset terminal of the DSP and to the output counter. The output node provides a first signal to the DSP generally concurrent with receipt of the external signal and a second signal generally concurrent with receipt of the counter output signal.